1. Field of the Invention
The present invention relates to a method of and a system for exposing a pattern on an object, such as a semiconductor wafer or a mask coated with resist, by a charged particle beam passing through a blanking aperture array to make multibeam.
2. Description of the Related Art
In the current trend for miniaturization of the elements used in semiconductor integrated circuits, application of charged particle beam exposure systems in mass production is eagerly awaited. Generally, electrons are used for charged particles. In such a system, it is possible to perform fine processing at 0.05 .mu.m or smaller with a positioning precision of 0.02 .mu.m or smaller. A charged particle beam is caused to scan and, as a result, the exposure time is longer compared to that in light exposure. To reduce this problem, there is a method that uses a blanking aperture array (BAA) to make a charged particle beam a multibeam (U.S. Pat No. 4,153,843 corresponding to First Publication No. 53-117387 of Japanese Patent Application). With this method, exposure of minute patterns at high speed, for example 100 mm/sec, of a mobile stage upon which the wafer is mounted is expected. The mobile stage is continuously moved while the multibeam is deflected by a main deflector and a sub deflector. However, since exposure is performed by the charged particle beam scanning, the exposure takes longer than in photo exposure. Because of this, it is necessary to improve the throughput of the charged particle beam exposure system.
(1) Reduction in throughput of exposure depending upon the scanning method.
Scanning of the charged particle beam on a semiconductor wafer is performed by the mobile stage upon which the wafer is mounted, the main deflector and the sub deflector that are positioned above the mobile stage. Normally, the main deflector is the electromagnetic type and the sub deflector is the electrostatic type.
The ranges over which scanning is possible at the required accuracy with these means are, from largest to smallest: the mobile stage, the main deflector, the sub deflector. However, the order of their scanning speeds is, from fastest to slowest: the sub deflector, the main deflector, the mobile stage. By taking advantage of these characteristics of the scanning means, the scanning of the charged particle beam onto the wafer is performed as shown in FIGS. 13(A) and 13(B).
In FIG. 13(A), areas 111 to 115 on the semiconductor wafer 10 are scanned continuously by the mobile stage, as indicated with the alternate long and short line L1. Also, the areas between the centers of the subfields are scanned in steps by the main deflector in the order of the subfields: 12, 13, 14, 15D, . . . , see line L2. However, if no exposure data are present in the subfields between the subfields 13 and 16, for instance, the main deflector jumps from the subfield 13 to the subfield 16. Each subfield is scanned by the sub deflector in the state in which the main deflection is constant.
In FIG. 13(B), the range over which the multibeam, which has passed through a BAA 30, to be explained later, can be deflected by the sub deflector is A1, indicated by the alternate long and short line, with the scanning point of the main deflector at Q1. The subfield 12 is scanned by the sub deflector along the alternate long and two short dashes line L3 and the dotted line L4 in the order of cell strips 121 to 125. The alternate long and two short dashes line L3 is a scanning line during exposure and the dotted line L4 is at blanking (flyback). During sub scanning, since the semiconductor wafer 10 is continuously moving on the mobile stage, the scanning point of the main deflector is at Q2 at the end of the scanning of the subfield 12.
In this state, the scanning point of the main deflector is changed in one step to Q3, shifting the range of the sub deflection to A2, indicated with the alternate long and two short dashes line, and the subfield 13 is scanned by the sub deflector in the order of cell stripes 131 to 135 in the same manner.
The scanning described above is performed repeatedly.
When exposure data are present in the cell stripe 131 but no exposure data are present in the cell stripes 132 to 135, for instance, too, the main scanning point must be changed from Q2 to Q3 in a large step and because of this, settling time at the time of the step change is lengthened, causing a reduction in the throughput of exposure.
In addition, if cell stripes are shortened to perform sub scanning so as to ensure that the scan never exceeds the sub scanning range A1, the total number of cell stripes must be increased, increasing the number of times flyback must be implemented during sub scanning and lowering the throughput of exposure.
(2) Lowering throughput of exposure during sub scanning
FIG. 14 (A) shows a drive circuit for an electrostatic sub deflector 20 for deflecting a multibeam EB2.
The quantity of sub deflection QRX2 is converted to an analog current QRX3 at a D/A converter 21 and changes as shown in FIG. 14(B). The current QRX3 is converted to a voltage QRX4 by a current/voltage converter 22. Although the response frequency of the D/A converter 21 is approximately 10 to 20 MHz, the frequency of the data supplied to the BAA is set to, for instance, 400 MHz for high speed exposure and, therefore, it is necessary to cause the sub deflector 20 to continuously scan the multibeam EB2 by smoothing the waveform of the voltage QRX4. To achieve this, the voltage QRX4 is amplified and the high frequency component is cut at an amplification & low pass filter circuit 28 and becomes a smooth voltage QRX5, as shown in FIG. 14(B). Points R1, R2 and R3 in the graph of the voltage QRX5 correspond to points R1, R2 and R3 respectively in FIG. 13(B).
During the time t3, the current QRX3 changes in small steps from the maximum value to the minimum value, and the voltage QRX5 changes linearly from the minimum value to the maximum value. However, when the current QRX3 has changed in a large step from the minimum value to the maximum value, the voltage QRX5, with its high frequency component cut at the amplification & low pass filter circuit 23, steps down gently and the time period elapsing during this process, i.e., the time t2, is approximately equal to t3. The time t1 or t3 and the time t2 are both approximately 4 .mu.s. Since t2 is wasted time, in order to improve the throughput of exposure, it is necessary to minimize t2/t1.
(3) Lowering throughput of exposure caused by error detection and correction
FIG. 15 shows a BAA 30 and a multi-beam controlling circuit.
In the BAA 30, a lattice of apertures 33 is formed inside an area 32 of a thin substrate 31. For each aperture 33, a pair of electrodes, one a common electrode 34 and the other a blanking electrode 35, are formed on the substrate 31 with the common electrode 34 connected to the ground line.
A charged particle beam is projected to the area 32 on the substrate 31. A charged particle beam that has passed through an aperture 33 then passes through a round aperture on the aperture stop under the BAA 30 so long as the potential of the blanking electrode 35 is set to 0 V. However, if a non-zero potential Vs is applied to the blanking electrode 35, the charged particle beam is deflected and is blocked at the aperture stop under the BAA 30. Consequently, by providing a 0/Vs potential pattern to the blanking electrodes 35 in correspondence to the bitmap data of a exposure pattern, a desired fine pattern can be exposed on the semiconductor wafer 10.
For instance, each aperture 33 is a square with its sides at 25 .mu.m and the area exposed on the semiconductor wafer 10 by this aperture 33 is an approximately square shape with sides at 0.08 .mu.m. The direction X is referred to as the lengthwise direction of the rows of the apertures 33 and two actual rows of the apertures 33 are considered as one logical row. For the sake of simplification, FIG. 15 shows the apertures 33 in three logical rows over twenty columns, but in reality, the apertures 33 may be formed, for instance, in eight logical rows over 128 columns.
When there are m logical rows over n columns of apertures 33, the aperture 33 and the blanking electrode 35 in the i-th row at the j-th column are indicated as the aperture 33(i,j) and the blanking electrode 35(i,j) respectively. The pitch p of the apertures 33 in the direction Y must be, for instance, three times the length a of one side of the aperture 33, in order to secure enough area for the electrodes and wiring.
A BAA drive circuit (multibeam control circuit) 40 is provided with dot buffer memories 411 to 41n in which bitmap data of patterns provided through read/write circuit 42 are written. A dot buffer memory 41j (j is anyone of 1 to n) outputs dot data for j-th column of the blanking electrode 35. Each of the dot buffer memories 411 to 41n have the same storage capacity.
A n-bit parallel data that corresponds to the 1st to nth column of the blanking electrodes 35 is output by a clock, address and control signals from a control circuit 43 which is operated in synchronization with a clock .phi. 0. Each of the dot buffer memories 411 to 41n is divided into, for instance, two areas so that while dot data are written in one area through a direct memory access, dot data are read out from the other area. Each time the read and write for one frame is completed, the read area and the write area are switched.
A dot data from the dot buffer memory 41j having parallel/serial conversion circuit at an output stage is provided to the data input of the least significant bit of a shift register 44j. The shift register 44j is shifted by one bit toward the higher digit by one clock pulse from the control circuit 43, a frequency of the clock being, for instance, 400 MHz.
As shown in FIG. 16, the electrode 35(i, j) is connected via a transistor switch to a voltage source line of the potential Vs or a grand line. A k-th bit output from the least significant bit (0-th bit) of the shift registers 44j is connected to a control input of the transistor switch. Where k is expressed as EQU k=2(p/a) (i-1) when j is an odd number and EQU k=2 (p/a) (2i-1) when j is an even number.
The potential of the blanking electrode 35(i, j) is at 0/Vs when the k-th bit of the shift registers 44j is `1`/`0`, and the charged particle beam which has passed through the aperture 33 (i, j) is radiated on the semiconductor wafer 10 only when this potential is at 0 V. The scanning speed of the charged particle beam is adjusted at a constant level so that, when the cycle of the clock .phi. is T, supposing that the charged particle beam passes the aperture 33 (1, j) at a time point t=0 irradiates a point P on the semiconductor wafer 10, the charged particle beams that pass through the aperture 33(2, j), the aperture 33(3, j), . . . , the aperture 33(m, j) at time points t=2(p/a)T, t=4(p/a)T, . . . , T=2(m-1) (p/a)T respectively, irradiate the same point P on the semiconductor wafer 10.
Thus, on the semiconductor wafer 10, the same spot is exposed m times with the same dot data. In addition, the spaces between dots that are exposed at the time point t after the beam passes through the aperture 33 (i, j), j=1, 3, 5, . . . , n-1 are exposed at time point t+(p/a) T after the beam passes through the apertures 33 (i, j), j=2, 4, 6, . . . , n.
For instance, when the area exposed on the semiconductor wafer 10 by one aperture in BAA is a square with sides at 0.08 .mu.m and the area to be exposed on a semiconductor chip is a square with sides at 20 mm, at least (20,000/0.08).sup.2 =62.5 Gbit is needed for exposure data. For instance, four times as many as that, namely 250 Gbit, is needed for exposure data if length adjustment of patterns or correction of proximity effect with high accuracy is performed.
Since huge quantities of data are read out, written and transferred at high speed via the BAA drive circuit 40 in FIG. 15 and a data generating circuit provided at a stage preceding the BAA drive circuit, it is necessary to improve reliability by detecting an error when bits are inverted due to noise. Usually, parity check is employed to detect data errors in the transfer path. However, since one parity bit is required for each byte of 8 bits, 64 parity check circuits will be required for 512-bit parallel data, increasing the scale of the circuits. In addition, although error detection and correction can be performed by an ECS (Error Correction System), the circuit scale will be larger than that of the party check circuits and, moreover, high speed processing at the 400 MHz level becomes difficult. Thus, the speed at which data are transferred to the BAA 30 must be lowered for error detection, causing a reduction in throughput of exposure.